control.hpp

Go to the documentation of this file.

/**
 * @file control.hpp
 * @brief ARM Cortex-M interrupt control primitives
 * @ingroup hal
 * 
 * Low-level hardware operations for ARM interrupt control using CMSIS intrinsics.
 * Provides minimal hardware primitives without RAII - use patterns layer for convenience.
 */
 
#ifndef SBL_HAL_INTERRUPTS_CONTROL_HPP_
#define SBL_HAL_INTERRUPTS_CONTROL_HPP_
 
#include <cstdint>
 
// ARM CMSIS intrinsics - platform provides implementation
#ifndef __get_PRIMASK
#define __get_PRIMASK() (0)  // Fallback for non-ARM builds
#endif
 
#ifndef __disable_irq
#define __disable_irq() do {} while(0)  // Fallback for non-ARM builds
#endif
 
#ifndef __set_PRIMASK
#define __set_PRIMASK(x) do { (void)(x); } while(0)  // Fallback for non-ARM builds
#endif
 
namespace sbl {
namespace core {
namespace hal {
namespace interrupts {
 
/**
 * @brief Disable ARM interrupts and return previous state
 * 
 * Disables all interrupts (except NMI/Hard Fault) using ARM PRIMASK register.
 * Returns previous PRIMASK state for later restoration.
 * 
 * @return Previous PRIMASK register value
 */
inline uint32_t disable_and_save() {
    uint32_t saved_primask = __get_PRIMASK();
    __disable_irq();
    return saved_primask;
}
 
/**
 * @brief Restore ARM interrupt state
 * 
 * Restores PRIMASK register to specified state.
 * Typically used with value returned from disable_and_save().
 * 
 * @param saved_state Previous PRIMASK value to restore
 */
inline void restore(uint32_t saved_state) {
    __set_PRIMASK(saved_state);
}
 
/**
 * @brief Get current ARM interrupt state
 * 
 * @return Current PRIMASK register value (0 = enabled, 1 = disabled)
 */
inline uint32_t get_state() {
    return __get_PRIMASK();
}
 
/**
 * @brief Check if ARM interrupts are enabled
 * 
 * @return true if interrupts enabled, false if disabled
 */
inline bool are_enabled() {
    return __get_PRIMASK() == 0;
}
 
} // namespace interrupts
} // namespace hal
} // namespace core
} // namespace sbl
 
#endif // SBL_HAL_INTERRUPTS_CONTROL_HPP_